JPH0543291B2 - - Google Patents

Info

Publication number
JPH0543291B2
JPH0543291B2 JP62254146A JP25414687A JPH0543291B2 JP H0543291 B2 JPH0543291 B2 JP H0543291B2 JP 62254146 A JP62254146 A JP 62254146A JP 25414687 A JP25414687 A JP 25414687A JP H0543291 B2 JPH0543291 B2 JP H0543291B2
Authority
JP
Japan
Prior art keywords
layer
insulating film
forming
opening
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62254146A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0195564A (ja
Inventor
Kazuhiko Inoe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP62254146A priority Critical patent/JPH0195564A/ja
Priority to US07/253,171 priority patent/US4895811A/en
Priority to DE3886871T priority patent/DE3886871T2/de
Priority to EP88116670A priority patent/EP0311109B1/en
Publication of JPH0195564A publication Critical patent/JPH0195564A/ja
Publication of JPH0543291B2 publication Critical patent/JPH0543291B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/051—Manufacture or treatment of FETs having PN junction gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/83—FETs having PN junction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351—Substrate regions of field-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/088—J-Fet, i.e. junction field effect transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/10—Lift-off masking
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/105—Masks, metal

Landscapes

  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
JP62254146A 1987-10-08 1987-10-08 半導体装置の製造方法 Granted JPH0195564A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP62254146A JPH0195564A (ja) 1987-10-08 1987-10-08 半導体装置の製造方法
US07/253,171 US4895811A (en) 1987-10-08 1988-10-04 Method of manufacturing semiconductor device
DE3886871T DE3886871T2 (de) 1987-10-08 1988-10-07 Verfahren zur Herstellung eines Feldeffekttransistors mit Übergangsgatter.
EP88116670A EP0311109B1 (en) 1987-10-08 1988-10-07 Method of manufacturing a field-effect transistor having a junction gate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62254146A JPH0195564A (ja) 1987-10-08 1987-10-08 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPH0195564A JPH0195564A (ja) 1989-04-13
JPH0543291B2 true JPH0543291B2 (en]) 1993-07-01

Family

ID=17260862

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62254146A Granted JPH0195564A (ja) 1987-10-08 1987-10-08 半導体装置の製造方法

Country Status (4)

Country Link
US (1) US4895811A (en])
EP (1) EP0311109B1 (en])
JP (1) JPH0195564A (en])
DE (1) DE3886871T2 (en])

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5273937A (en) * 1988-01-08 1993-12-28 Kabushiki Kaisha Toshiba Metal semiconductor device and method for producing the same
US5011785A (en) * 1990-10-30 1991-04-30 The United States Of America As Represented By The Secretary Of The Navy Insulator assisted self-aligned gate junction
DE4113969A1 (de) * 1991-04-29 1992-11-05 Telefunken Electronic Gmbh Verfahren zur herstellung von ohmschen kontakten fuer verbindungshalbleiter
US5536677A (en) * 1994-12-01 1996-07-16 Motorola, Inc. Method of forming conductive bumps on a semiconductor device using a double mask structure
US6609652B2 (en) * 1997-05-27 2003-08-26 Spheretek, Llc Ball bumping substrates, particuarly wafers
US6051856A (en) * 1997-09-30 2000-04-18 Samsung Electronics Co., Ltd. Voltage-controlled resistor utilizing bootstrap gate FET

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2824026A1 (de) * 1978-06-01 1979-12-20 Licentia Gmbh Verfahren zum herstellen eines sperrschicht-feldeffekttransistors
JPS57178376A (en) * 1981-04-27 1982-11-02 Sumitomo Electric Ind Ltd Junction type field-effect transistor
JPS57178374A (en) * 1981-04-27 1982-11-02 Sumitomo Electric Ind Ltd Junction type field-efect transistor and its manufacture
DE3150412A1 (de) * 1981-12-19 1983-07-14 Drägerwerk AG, 2400 Lübeck Notatemschutzgeraet
JPS58143586A (ja) * 1982-02-22 1983-08-26 Toshiba Corp 電界効果トランジスタの製造方法
JPS58145158A (ja) * 1982-02-23 1983-08-29 Toshiba Corp 電界効果トランジスタ及びその製造方法
US4561169A (en) * 1982-07-30 1985-12-31 Hitachi, Ltd. Method of manufacturing semiconductor device utilizing multilayer mask
JPS61163664A (ja) * 1985-01-11 1986-07-24 Mitsubishi Electric Corp 半導体装置の製造方法
JPS61177780A (ja) * 1985-02-01 1986-08-09 Mitsubishi Electric Corp 半導体装置の製造方法
FR2579827B1 (fr) * 1985-04-01 1987-05-15 Thomson Csf Procede de realisation d'un transistor a effet de champ a metallisation de grille autoalignee
JPS6273676A (ja) * 1985-09-26 1987-04-04 Nec Corp 接合型電界効果トランジスタの製造方法
US4729967A (en) * 1987-04-09 1988-03-08 Gte Laboratories Incorporated Method of fabricating a junction field effect transistor

Also Published As

Publication number Publication date
EP0311109A3 (en) 1989-07-12
JPH0195564A (ja) 1989-04-13
EP0311109A2 (en) 1989-04-12
DE3886871D1 (de) 1994-02-17
DE3886871T2 (de) 1994-06-09
EP0311109B1 (en) 1994-01-05
US4895811A (en) 1990-01-23

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees